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Purpose of level-shifter with same in and out voltages
The Next CEO of Stack OverflowCan I use a voltage divider circuit instead of a level shifter here?Is it safe to use a bus buffer as level shifter?Why is the MISO not level shifted in this circuit?Level shifter circuit with 50 V outputBi-Directional Level Shifter Circuit with pull-down resistorsLogic Level ShifterDo I need a level shifter with an open drain outputLevel Shifter Issue with GroundHow to connect a CD40109BE Voltage Level ShifterWhat's wrong with this single-transistor level-shifter?
$begingroup$
I am looking at a schematic for the Pixhawk 2 board (page 3).
The UART ports on the microcontroller are sent through a level-shifter chip (TXS0108) where the input voltage is the same as the output voltage. What benefit does this provide?
microcontroller digital-logic level-shifting
asked yesterday
user8908459user8908459
32829
$endgroup$
add a comment |
$begingroup$
I am looking at a schematic for the Pixhawk 2 board (page 3).
The UART ports on the microcontroller are sent through a level-shifter chip (TXS0108) where the input voltage is the same as the output voltage. What benefit does this provide?
microcontroller digital-logic level-shifting
asked yesterday
user8908459user8908459
32829
$endgroup$
add a comment |
$begingroup$
I am looking at a schematic for the Pixhawk 2 board (page 3).
The UART ports on the microcontroller are sent through a level-shifter chip (TXS0108) where the input voltage is the same as the output voltage. What benefit does this provide?
microcontroller digital-logic level-shifting
asked yesterday
user8908459user8908459
32829
$endgroup$
I am looking at a schematic for the Pixhawk 2 board (page 3).
The UART ports on the microcontroller are sent through a level-shifter chip (TXS0108) where the input voltage is the same as the output voltage. What benefit does this provide?
microcontroller digital-logic level-shifting
microcontroller digital-logic level-shifting
asked yesterday
user8908459user8908459
32829
asked yesterday
user8908459user8908459
32829
asked yesterday
user8908459user8908459
32829
asked yesterday
user8908459user8908459
32829
asked yesterday
user8908459user8908459
32829
32829
add a comment |
add a comment |
4 Answers
4
active
oldest
votes
$begingroup$
The level shifter is used not only to "shift" the logic levels of a signal, but also to lower the impedance of its source and increase its current drive capability in order to drive heavier loads without going out of specifications: in this case, the higher impedance output UART is sent to out the microcontroller board via the TXS0108 probably to rise its output drive capability.
answered yesterday
Daniele TampieriDaniele Tampieri
1,1881715
$endgroup$
$begingroup$
I have never seen another design where the UART is buffered. Do you think this is only necessary since the connection leaves the board and the external impedance is unknown?
$endgroup$
– user8908459
yesterday
$begingroup$
@user8908459 Yes, I think so: perhaps the designer(s) tried to make the UART output as more independent as possible from the unknown external impedance. From the datasheet I see that the absolute maximum rating of output current per output pin is $pm50mathrmmA$, which somewhat allows some resistance to overload.
$endgroup$
– Daniele Tampieri
yesterday
$begingroup$
@user8908459 Perhaps you could check my hypothesis is correct by looking at the output capability of the UART microcontroller outputs. If this is lower than the one available from the TSX0108, perhaps my hypothesis is correct.
$endgroup$
– Daniele Tampieri
yesterday
1
$begingroup$
Is it typical to send UART interfaces off-board? I generally think of RS-232/422 being more appropriate for this.
$endgroup$
– user8908459
yesterday
1
$begingroup$
Per you previous comment, I verified that the microcontroller pins source less current (25mA) than the TSX0108 (50mA)
$endgroup$
– user8908459
yesterday
|
show 3 more comments
$begingroup$
On the full schematic there is an interesting note that starts:-
due to the serial lines being able to back power the cpu...
The STM32F407 MCU is only rated for an absolute maximum of 5mA injected current per pin (-5mA, +0mA on 5V tolerant pins), so if it was powered through a UART pin it could easily be damaged. The TXS0108 level shifter is rated for 50mA per input, so it is less likely to be damaged by eg. connecting an RS232 serial device (which might put out +-12V at 15mA or more).
Another reason for buffering the serial port lines could be to make the MCU more tolerant of EMI. Autopilots are often used in harsh environments with nearby rf transmitters and high power brushless motors. An EMI induced glitch that caused the MCU to freeze or go crazy could crash the drone before it had time to recover.
answered yesterday
Bruce AbbottBruce Abbott
25.8k11934
$endgroup$
add a comment |
$begingroup$
The only obvious thing (other than buffering) I see is that the I/O can be disabled via a control line Level_Shift Enable.
When that line is low the outputs are high-impedance, so it acts as a bidirectional tri-state buffer.
answered yesterday
Spehro PefhanySpehro Pefhany
212k5162428
$endgroup$
$begingroup$
On page 1, there is a circuit which permanently ties the Level_Shift_Enable line high, so there is no way to disable the output.
$endgroup$
– user8908459
yesterday
2
$begingroup$
It will provide buffering which might be in play here. The termination resistors imply they're worried about ringing.
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
Oh, I think I see now. In this system, the serial devices may power up before the microcontroller. This chip will protect the inputs from becoming back-biased before power is applied to the microcontroller.
$endgroup$
– user8908459
yesterday
$begingroup$
I looked for that first, but am not sure that's the reason- the inputs don't seem to permit inputs above the power supply (some chips do allow that).
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
There are two voltages here: a 5V line and a 3.3V line. The 5V line powers the peripherals. It is also the input for the LDO (U5001) which provides 3.3V on the FMU-VDD_3V3 line. The 5V line comes up first meaning that the peripherals could be driving the IO pins before the microcontroller power supply is at full output.
$endgroup$
– user8908459
yesterday
add a comment |
$begingroup$
The other answers do not make sense. The output impedance of a microcontroller pin is about 30 ohms: perfectly capable of driving the 120 ohm series resistors.
Also, I have not seen a microcontroller where you don't have tristate control in the chip.
I suspect historical reasons: in the past it was level shift to 5V,which has evolved to levelshift to 3.3V, but to reduce impact on the layout the levelshifter was left in place.
answered yesterday
rewrew
1654
$endgroup$
add a comment |
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4 Answers
4
active
oldest
votes
4 Answers
4
active
oldest
votes
active
oldest
votes
active
oldest
votes
$begingroup$
The level shifter is used not only to "shift" the logic levels of a signal, but also to lower the impedance of its source and increase its current drive capability in order to drive heavier loads without going out of specifications: in this case, the higher impedance output UART is sent to out the microcontroller board via the TXS0108 probably to rise its output drive capability.
answered yesterday
Daniele TampieriDaniele Tampieri
1,1881715
$endgroup$
$begingroup$
I have never seen another design where the UART is buffered. Do you think this is only necessary since the connection leaves the board and the external impedance is unknown?
$endgroup$
– user8908459
yesterday
$begingroup$
@user8908459 Yes, I think so: perhaps the designer(s) tried to make the UART output as more independent as possible from the unknown external impedance. From the datasheet I see that the absolute maximum rating of output current per output pin is $pm50mathrmmA$, which somewhat allows some resistance to overload.
$endgroup$
– Daniele Tampieri
yesterday
$begingroup$
@user8908459 Perhaps you could check my hypothesis is correct by looking at the output capability of the UART microcontroller outputs. If this is lower than the one available from the TSX0108, perhaps my hypothesis is correct.
$endgroup$
– Daniele Tampieri
yesterday
1
$begingroup$
Is it typical to send UART interfaces off-board? I generally think of RS-232/422 being more appropriate for this.
$endgroup$
– user8908459
yesterday
1
$begingroup$
Per you previous comment, I verified that the microcontroller pins source less current (25mA) than the TSX0108 (50mA)
$endgroup$
– user8908459
yesterday
|
show 3 more comments
$begingroup$
The level shifter is used not only to "shift" the logic levels of a signal, but also to lower the impedance of its source and increase its current drive capability in order to drive heavier loads without going out of specifications: in this case, the higher impedance output UART is sent to out the microcontroller board via the TXS0108 probably to rise its output drive capability.
answered yesterday
Daniele TampieriDaniele Tampieri
1,1881715
$endgroup$
$begingroup$
I have never seen another design where the UART is buffered. Do you think this is only necessary since the connection leaves the board and the external impedance is unknown?
$endgroup$
– user8908459
yesterday
$begingroup$
@user8908459 Yes, I think so: perhaps the designer(s) tried to make the UART output as more independent as possible from the unknown external impedance. From the datasheet I see that the absolute maximum rating of output current per output pin is $pm50mathrmmA$, which somewhat allows some resistance to overload.
$endgroup$
– Daniele Tampieri
yesterday
$begingroup$
@user8908459 Perhaps you could check my hypothesis is correct by looking at the output capability of the UART microcontroller outputs. If this is lower than the one available from the TSX0108, perhaps my hypothesis is correct.
$endgroup$
– Daniele Tampieri
yesterday
1
$begingroup$
Is it typical to send UART interfaces off-board? I generally think of RS-232/422 being more appropriate for this.
$endgroup$
– user8908459
yesterday
1
$begingroup$
Per you previous comment, I verified that the microcontroller pins source less current (25mA) than the TSX0108 (50mA)
$endgroup$
– user8908459
yesterday
|
show 3 more comments
$begingroup$
The level shifter is used not only to "shift" the logic levels of a signal, but also to lower the impedance of its source and increase its current drive capability in order to drive heavier loads without going out of specifications: in this case, the higher impedance output UART is sent to out the microcontroller board via the TXS0108 probably to rise its output drive capability.
answered yesterday
Daniele TampieriDaniele Tampieri
1,1881715
$endgroup$
The level shifter is used not only to "shift" the logic levels of a signal, but also to lower the impedance of its source and increase its current drive capability in order to drive heavier loads without going out of specifications: in this case, the higher impedance output UART is sent to out the microcontroller board via the TXS0108 probably to rise its output drive capability.
answered yesterday
Daniele TampieriDaniele Tampieri
1,1881715
answered yesterday
Daniele TampieriDaniele Tampieri
1,1881715
answered yesterday
Daniele TampieriDaniele Tampieri
1,1881715
answered yesterday
Daniele TampieriDaniele Tampieri
1,1881715
1,1881715
$begingroup$
I have never seen another design where the UART is buffered. Do you think this is only necessary since the connection leaves the board and the external impedance is unknown?
$endgroup$
– user8908459
yesterday
$begingroup$
@user8908459 Yes, I think so: perhaps the designer(s) tried to make the UART output as more independent as possible from the unknown external impedance. From the datasheet I see that the absolute maximum rating of output current per output pin is $pm50mathrmmA$, which somewhat allows some resistance to overload.
$endgroup$
– Daniele Tampieri
yesterday
$begingroup$
@user8908459 Perhaps you could check my hypothesis is correct by looking at the output capability of the UART microcontroller outputs. If this is lower than the one available from the TSX0108, perhaps my hypothesis is correct.
$endgroup$
– Daniele Tampieri
yesterday
1
$begingroup$
Is it typical to send UART interfaces off-board? I generally think of RS-232/422 being more appropriate for this.
$endgroup$
– user8908459
yesterday
1
$begingroup$
Per you previous comment, I verified that the microcontroller pins source less current (25mA) than the TSX0108 (50mA)
$endgroup$
– user8908459
yesterday
|
show 3 more comments
$begingroup$
I have never seen another design where the UART is buffered. Do you think this is only necessary since the connection leaves the board and the external impedance is unknown?
$endgroup$
– user8908459
yesterday
$begingroup$
@user8908459 Yes, I think so: perhaps the designer(s) tried to make the UART output as more independent as possible from the unknown external impedance. From the datasheet I see that the absolute maximum rating of output current per output pin is $pm50mathrmmA$, which somewhat allows some resistance to overload.
$endgroup$
– Daniele Tampieri
yesterday
$begingroup$
@user8908459 Perhaps you could check my hypothesis is correct by looking at the output capability of the UART microcontroller outputs. If this is lower than the one available from the TSX0108, perhaps my hypothesis is correct.
$endgroup$
– Daniele Tampieri
yesterday
1
$begingroup$
Is it typical to send UART interfaces off-board? I generally think of RS-232/422 being more appropriate for this.
$endgroup$
– user8908459
yesterday
1
$begingroup$
Per you previous comment, I verified that the microcontroller pins source less current (25mA) than the TSX0108 (50mA)
$endgroup$
– user8908459
yesterday
$begingroup$
I have never seen another design where the UART is buffered. Do you think this is only necessary since the connection leaves the board and the external impedance is unknown?
$endgroup$
– user8908459
yesterday
$begingroup$
I have never seen another design where the UART is buffered. Do you think this is only necessary since the connection leaves the board and the external impedance is unknown?
$endgroup$
– user8908459
yesterday
$begingroup$
@user8908459 Yes, I think so: perhaps the designer(s) tried to make the UART output as more independent as possible from the unknown external impedance. From the datasheet I see that the absolute maximum rating of output current per output pin is $pm50mathrmmA$, which somewhat allows some resistance to overload.
$endgroup$
– Daniele Tampieri
yesterday
$begingroup$
@user8908459 Yes, I think so: perhaps the designer(s) tried to make the UART output as more independent as possible from the unknown external impedance. From the datasheet I see that the absolute maximum rating of output current per output pin is $pm50mathrmmA$, which somewhat allows some resistance to overload.
$endgroup$
– Daniele Tampieri
yesterday
$begingroup$
@user8908459 Perhaps you could check my hypothesis is correct by looking at the output capability of the UART microcontroller outputs. If this is lower than the one available from the TSX0108, perhaps my hypothesis is correct.
$endgroup$
– Daniele Tampieri
yesterday
$begingroup$
@user8908459 Perhaps you could check my hypothesis is correct by looking at the output capability of the UART microcontroller outputs. If this is lower than the one available from the TSX0108, perhaps my hypothesis is correct.
$endgroup$
– Daniele Tampieri
yesterday
1
1
$begingroup$
Is it typical to send UART interfaces off-board? I generally think of RS-232/422 being more appropriate for this.
$endgroup$
– user8908459
yesterday
$begingroup$
Is it typical to send UART interfaces off-board? I generally think of RS-232/422 being more appropriate for this.
$endgroup$
– user8908459
yesterday
1
1
$begingroup$
Per you previous comment, I verified that the microcontroller pins source less current (25mA) than the TSX0108 (50mA)
$endgroup$
– user8908459
yesterday
$begingroup$
Per you previous comment, I verified that the microcontroller pins source less current (25mA) than the TSX0108 (50mA)
$endgroup$
– user8908459
yesterday
|
show 3 more comments
$begingroup$
On the full schematic there is an interesting note that starts:-
due to the serial lines being able to back power the cpu...
The STM32F407 MCU is only rated for an absolute maximum of 5mA injected current per pin (-5mA, +0mA on 5V tolerant pins), so if it was powered through a UART pin it could easily be damaged. The TXS0108 level shifter is rated for 50mA per input, so it is less likely to be damaged by eg. connecting an RS232 serial device (which might put out +-12V at 15mA or more).
Another reason for buffering the serial port lines could be to make the MCU more tolerant of EMI. Autopilots are often used in harsh environments with nearby rf transmitters and high power brushless motors. An EMI induced glitch that caused the MCU to freeze or go crazy could crash the drone before it had time to recover.
answered yesterday
Bruce AbbottBruce Abbott
25.8k11934
$endgroup$
add a comment |
$begingroup$
On the full schematic there is an interesting note that starts:-
due to the serial lines being able to back power the cpu...
The STM32F407 MCU is only rated for an absolute maximum of 5mA injected current per pin (-5mA, +0mA on 5V tolerant pins), so if it was powered through a UART pin it could easily be damaged. The TXS0108 level shifter is rated for 50mA per input, so it is less likely to be damaged by eg. connecting an RS232 serial device (which might put out +-12V at 15mA or more).
Another reason for buffering the serial port lines could be to make the MCU more tolerant of EMI. Autopilots are often used in harsh environments with nearby rf transmitters and high power brushless motors. An EMI induced glitch that caused the MCU to freeze or go crazy could crash the drone before it had time to recover.
answered yesterday
Bruce AbbottBruce Abbott
25.8k11934
$endgroup$
add a comment |
$begingroup$
On the full schematic there is an interesting note that starts:-
due to the serial lines being able to back power the cpu...
The STM32F407 MCU is only rated for an absolute maximum of 5mA injected current per pin (-5mA, +0mA on 5V tolerant pins), so if it was powered through a UART pin it could easily be damaged. The TXS0108 level shifter is rated for 50mA per input, so it is less likely to be damaged by eg. connecting an RS232 serial device (which might put out +-12V at 15mA or more).
Another reason for buffering the serial port lines could be to make the MCU more tolerant of EMI. Autopilots are often used in harsh environments with nearby rf transmitters and high power brushless motors. An EMI induced glitch that caused the MCU to freeze or go crazy could crash the drone before it had time to recover.
answered yesterday
Bruce AbbottBruce Abbott
25.8k11934
$endgroup$
On the full schematic there is an interesting note that starts:-
due to the serial lines being able to back power the cpu...
The STM32F407 MCU is only rated for an absolute maximum of 5mA injected current per pin (-5mA, +0mA on 5V tolerant pins), so if it was powered through a UART pin it could easily be damaged. The TXS0108 level shifter is rated for 50mA per input, so it is less likely to be damaged by eg. connecting an RS232 serial device (which might put out +-12V at 15mA or more).
Another reason for buffering the serial port lines could be to make the MCU more tolerant of EMI. Autopilots are often used in harsh environments with nearby rf transmitters and high power brushless motors. An EMI induced glitch that caused the MCU to freeze or go crazy could crash the drone before it had time to recover.
answered yesterday
Bruce AbbottBruce Abbott
25.8k11934
answered yesterday
Bruce AbbottBruce Abbott
25.8k11934
answered yesterday
Bruce AbbottBruce Abbott
25.8k11934
answered yesterday
Bruce AbbottBruce Abbott
25.8k11934
25.8k11934
add a comment |
add a comment |
$begingroup$
The only obvious thing (other than buffering) I see is that the I/O can be disabled via a control line Level_Shift Enable.
When that line is low the outputs are high-impedance, so it acts as a bidirectional tri-state buffer.
answered yesterday
Spehro PefhanySpehro Pefhany
212k5162428
$endgroup$
$begingroup$
On page 1, there is a circuit which permanently ties the Level_Shift_Enable line high, so there is no way to disable the output.
$endgroup$
– user8908459
yesterday
2
$begingroup$
It will provide buffering which might be in play here. The termination resistors imply they're worried about ringing.
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
Oh, I think I see now. In this system, the serial devices may power up before the microcontroller. This chip will protect the inputs from becoming back-biased before power is applied to the microcontroller.
$endgroup$
– user8908459
yesterday
$begingroup$
I looked for that first, but am not sure that's the reason- the inputs don't seem to permit inputs above the power supply (some chips do allow that).
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
There are two voltages here: a 5V line and a 3.3V line. The 5V line powers the peripherals. It is also the input for the LDO (U5001) which provides 3.3V on the FMU-VDD_3V3 line. The 5V line comes up first meaning that the peripherals could be driving the IO pins before the microcontroller power supply is at full output.
$endgroup$
– user8908459
yesterday
add a comment |
$begingroup$
The only obvious thing (other than buffering) I see is that the I/O can be disabled via a control line Level_Shift Enable.
When that line is low the outputs are high-impedance, so it acts as a bidirectional tri-state buffer.
answered yesterday
Spehro PefhanySpehro Pefhany
212k5162428
$endgroup$
$begingroup$
On page 1, there is a circuit which permanently ties the Level_Shift_Enable line high, so there is no way to disable the output.
$endgroup$
– user8908459
yesterday
2
$begingroup$
It will provide buffering which might be in play here. The termination resistors imply they're worried about ringing.
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
Oh, I think I see now. In this system, the serial devices may power up before the microcontroller. This chip will protect the inputs from becoming back-biased before power is applied to the microcontroller.
$endgroup$
– user8908459
yesterday
$begingroup$
I looked for that first, but am not sure that's the reason- the inputs don't seem to permit inputs above the power supply (some chips do allow that).
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
There are two voltages here: a 5V line and a 3.3V line. The 5V line powers the peripherals. It is also the input for the LDO (U5001) which provides 3.3V on the FMU-VDD_3V3 line. The 5V line comes up first meaning that the peripherals could be driving the IO pins before the microcontroller power supply is at full output.
$endgroup$
– user8908459
yesterday
add a comment |
$begingroup$
The only obvious thing (other than buffering) I see is that the I/O can be disabled via a control line Level_Shift Enable.
When that line is low the outputs are high-impedance, so it acts as a bidirectional tri-state buffer.
answered yesterday
Spehro PefhanySpehro Pefhany
212k5162428
$endgroup$
The only obvious thing (other than buffering) I see is that the I/O can be disabled via a control line Level_Shift Enable.
When that line is low the outputs are high-impedance, so it acts as a bidirectional tri-state buffer.
answered yesterday
Spehro PefhanySpehro Pefhany
212k5162428
edited yesterday
answered yesterday
Spehro PefhanySpehro Pefhany
212k5162428
answered yesterday
Spehro PefhanySpehro Pefhany
212k5162428
answered yesterday
Spehro PefhanySpehro Pefhany
212k5162428
212k5162428
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On page 1, there is a circuit which permanently ties the Level_Shift_Enable line high, so there is no way to disable the output.
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– user8908459
yesterday
2
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It will provide buffering which might be in play here. The termination resistors imply they're worried about ringing.
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– Spehro Pefhany
yesterday
$begingroup$
Oh, I think I see now. In this system, the serial devices may power up before the microcontroller. This chip will protect the inputs from becoming back-biased before power is applied to the microcontroller.
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– user8908459
yesterday
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I looked for that first, but am not sure that's the reason- the inputs don't seem to permit inputs above the power supply (some chips do allow that).
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– Spehro Pefhany
yesterday
$begingroup$
There are two voltages here: a 5V line and a 3.3V line. The 5V line powers the peripherals. It is also the input for the LDO (U5001) which provides 3.3V on the FMU-VDD_3V3 line. The 5V line comes up first meaning that the peripherals could be driving the IO pins before the microcontroller power supply is at full output.
$endgroup$
– user8908459
yesterday
add a comment |
$begingroup$
On page 1, there is a circuit which permanently ties the Level_Shift_Enable line high, so there is no way to disable the output.
$endgroup$
– user8908459
yesterday
2
$begingroup$
It will provide buffering which might be in play here. The termination resistors imply they're worried about ringing.
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
Oh, I think I see now. In this system, the serial devices may power up before the microcontroller. This chip will protect the inputs from becoming back-biased before power is applied to the microcontroller.
$endgroup$
– user8908459
yesterday
$begingroup$
I looked for that first, but am not sure that's the reason- the inputs don't seem to permit inputs above the power supply (some chips do allow that).
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
There are two voltages here: a 5V line and a 3.3V line. The 5V line powers the peripherals. It is also the input for the LDO (U5001) which provides 3.3V on the FMU-VDD_3V3 line. The 5V line comes up first meaning that the peripherals could be driving the IO pins before the microcontroller power supply is at full output.
$endgroup$
– user8908459
yesterday
$begingroup$
On page 1, there is a circuit which permanently ties the Level_Shift_Enable line high, so there is no way to disable the output.
$endgroup$
– user8908459
yesterday
$begingroup$
On page 1, there is a circuit which permanently ties the Level_Shift_Enable line high, so there is no way to disable the output.
$endgroup$
– user8908459
yesterday
2
2
$begingroup$
It will provide buffering which might be in play here. The termination resistors imply they're worried about ringing.
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
It will provide buffering which might be in play here. The termination resistors imply they're worried about ringing.
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
Oh, I think I see now. In this system, the serial devices may power up before the microcontroller. This chip will protect the inputs from becoming back-biased before power is applied to the microcontroller.
$endgroup$
– user8908459
yesterday
$begingroup$
Oh, I think I see now. In this system, the serial devices may power up before the microcontroller. This chip will protect the inputs from becoming back-biased before power is applied to the microcontroller.
$endgroup$
– user8908459
yesterday
$begingroup$
I looked for that first, but am not sure that's the reason- the inputs don't seem to permit inputs above the power supply (some chips do allow that).
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
I looked for that first, but am not sure that's the reason- the inputs don't seem to permit inputs above the power supply (some chips do allow that).
$endgroup$
– Spehro Pefhany
yesterday
$begingroup$
There are two voltages here: a 5V line and a 3.3V line. The 5V line powers the peripherals. It is also the input for the LDO (U5001) which provides 3.3V on the FMU-VDD_3V3 line. The 5V line comes up first meaning that the peripherals could be driving the IO pins before the microcontroller power supply is at full output.
$endgroup$
– user8908459
yesterday
$begingroup$
There are two voltages here: a 5V line and a 3.3V line. The 5V line powers the peripherals. It is also the input for the LDO (U5001) which provides 3.3V on the FMU-VDD_3V3 line. The 5V line comes up first meaning that the peripherals could be driving the IO pins before the microcontroller power supply is at full output.
$endgroup$
– user8908459
yesterday
add a comment |
$begingroup$
The other answers do not make sense. The output impedance of a microcontroller pin is about 30 ohms: perfectly capable of driving the 120 ohm series resistors.
Also, I have not seen a microcontroller where you don't have tristate control in the chip.
I suspect historical reasons: in the past it was level shift to 5V,which has evolved to levelshift to 3.3V, but to reduce impact on the layout the levelshifter was left in place.
answered yesterday
rewrew
1654
$endgroup$
add a comment |
$begingroup$
The other answers do not make sense. The output impedance of a microcontroller pin is about 30 ohms: perfectly capable of driving the 120 ohm series resistors.
Also, I have not seen a microcontroller where you don't have tristate control in the chip.
I suspect historical reasons: in the past it was level shift to 5V,which has evolved to levelshift to 3.3V, but to reduce impact on the layout the levelshifter was left in place.
answered yesterday
rewrew
1654
$endgroup$
add a comment |
$begingroup$
The other answers do not make sense. The output impedance of a microcontroller pin is about 30 ohms: perfectly capable of driving the 120 ohm series resistors.
Also, I have not seen a microcontroller where you don't have tristate control in the chip.
I suspect historical reasons: in the past it was level shift to 5V,which has evolved to levelshift to 3.3V, but to reduce impact on the layout the levelshifter was left in place.
answered yesterday
rewrew
1654
$endgroup$
The other answers do not make sense. The output impedance of a microcontroller pin is about 30 ohms: perfectly capable of driving the 120 ohm series resistors.
Also, I have not seen a microcontroller where you don't have tristate control in the chip.
I suspect historical reasons: in the past it was level shift to 5V,which has evolved to levelshift to 3.3V, but to reduce impact on the layout the levelshifter was left in place.
answered yesterday
rewrew
1654
answered yesterday
rewrew
1654
answered yesterday
rewrew
1654
answered yesterday
rewrew
1654
1654
add a comment |
add a comment |
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